The increasing demand for on-time delivery is forcing semiconductor manufacturers to seek more efficient schedules of machines and other resources to meet targets while making effective use of excess capacities. This paper presents the modeling and solution methodology of lithography machine scheduling with load balancing and reticle expiration consideration for the bottleneck process of semiconductor fabrication. A mixed-integer optimization model is established with capacity constraints and processing requirements. The objective is to meet daily targets, to keep load balancing, to avoid reticles shortage, and to reduce the number of machine setups. The problem formulated above is solved by the branch-and-cut method. Although the formulation is linearized, the practical size problem is still difficult to solve because the convex hull is hard to obtain. To overcome efficiency difficulty, some constraints are modified. To further improve efficiency, a two-phase model is established. The higher phase is to reduce the problem range by relaxing some constraints, and the lower phase is for scheduling. Numerical testing shows that the method can generate high quality schedules within reasonable time.
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