首页> 外文会议>2012 11th International Symposium on Distributed Computing and Applications to Business, Engineering amp; Science. >Residue Signed-Digit Arithmetic and the Conversions between Residue and Binary Numbers for a Four-Moduli Set
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Residue Signed-Digit Arithmetic and the Conversions between Residue and Binary Numbers for a Four-Moduli Set

机译:四模数集的残差符号数字算法和残差与二进制数之间的转换

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By introducing a signed-digit (SD) number arithmetic into a residue number system (RNS), arithmetic operations can be performed efficiently. In this paper, a high-speed modulo m SD addition algorithm is proposed, where min {2^n-1, 2^n+1, 2^{2n}+1, 2^n}. By using the modulo m SD adders, a modulo m SD multiplier can be implemented with a binary adder tree structure. We also present an algorithm for the conversion from residue SD numbers to SD numbers for the four-moduli set {2^n-1, 2^n+1, 2^{2n}+1, 2^n} which can be designed using a two-level binary tree structure of the residue SD number additions. The comparison of the new converter using SD number arithmetic with the converter using binary arithmetic yields reductions in delays of 44%, 60% and 75% for n=4, n=8 and n=16, respectively.
机译:通过将符号数字(SD)算术引入残数系统(RNS),可以高效地执行算术运算。本文提出了一种高速模SD加法算法,其中min {2 ^ n-1,2 ^ n + 1,2 ^ {2n} +1,2 ^ n}。通过使用模m SD加法器,可以用二进制加法器树结构实现模m SD乘法器。我们还提出了可以设计的四模数集{2 ^ n-1,2 ^ n + 1,2 ^ {2n} +1,2 ^ n}从残差SD数转换为SD数的算法使用两级二叉树结构对残差SD号进行加法运算。将使用SD数算法的新转换器与使用二进制算法的转换器进行比较,对于n = 4,n = 8和n = 16,延迟分别减少了44%,60%和75%。

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