A new low power test pattern generator based on two-bit twisted ring counter

摘要

A new single input change (SIC) test pattern generator (TPG), called multi two-bit twisted ring counters (MTB-TRC), is presented in this paper. Experimental results based on ISCAS'85 benchmark circuits show that the proposed MTB-TRC has the improved performance (power, fault coverage and test length), compared with the corresponding already known TPGs. Another advantage of the proposed MTB-TRC is that the same TPG can be used for testing more than one module in a SOC.