VHDL code generation for FPGA implementation of digital control with co-simulation step

摘要

The principle of an automatic VHDL code generator dedicated to the control of the electric systems is presented in this paper. From the definition of classic regulator, it is possible to envisage a direct integration of the digital regulator in a FPGA component. The advantage of using a FPGA rather than a micro-controller lies in the fact of reaching very high sampling frequencies, allowing to obtain better performances with important bandwidths. It can be then considered that the digital regulator works in a quasi-analog mode. Experimental results are obtained for a Direct Current Power Flow Control (DCPFC) application to prove the better overall performance.