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High Performance Viterbi Decoder on Cell/B.E

机译:Cell / B.E上的高性能Viterbi解码器

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摘要

Viterbi decoding is widely used in many radio systems. Because of the large computation complexity, it is usually implemented with ASIC chips, FPGA, or optimized hardware accelerators. With the rapid development of the multicore technology, the multicore platforms become a reasonable choice for the software radio (SR) systems. The Cell Broadband Engine processor is a state-of-art multi-core platform designed by Sony, Toshiba, and IBM. In this paper, we present a 64-state soft input viterbi decoder for WiMAX SR Baseband system based on the Cell processor. With one SPE running at 3.2GHz, the viterbi decoder can achieve the throughput up to 30Mb/s to decode the tail-biting convolutional code. The performance demonstrates that the proposed Viterbi decoding implementation is very efficient. Moreover, the viterbi decoder can be easily integrated to the SR system and can provide a highly integrated SR solution. The optimization methodology in this module design can be extended to other modules on CELL platform
机译:维特比解码广泛用于许多无线电系统中。由于计算复杂性高,通常使用ASIC芯片,FPGA或优化的硬件加速器来实现。随着多核技术的飞速发展,多核平台已成为软件无线电(SR)系统的合理选择。 Cell宽带引擎处理器是由Sony,东芝和IBM设计的最先进的多核平台。在本文中,我们提出了一种基于Cell处理器的WiMAX SR基带系统的64状态软输入维特比解码器。使用一个运行在3.2GHz的SPE,维特比解码器可以实现高达30Mb / s的吞吐率,以解码咬尾卷积码。该性能证明所提出的维特比解码实现非常有效。此外,维特比解码器可以轻松集成到SR系统,并可以提供高度集成的SR解决方案。该模块设计中的优化方法可以扩展到CELL平台上的其他模块

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