Impact of Heat Source Localization on Conduction Cooling of Silicon-on-Insulator Devices

摘要

The temperature rise in compact silicon devices is strongly underestimated at present by simulations using conventional heat diffusion theory, which is based on the Fourier heat conduction law. This problem is particularly important for devices in which the region of strong electron-phonon coupling is narrower than the phonon mean free path,Λ. The phonon mean free path in silicon near room temperature is already comparable to the minimum feature size of current generation transistors. This work numerically integrates the phonon Boltzmann transport equation (BTE) in order to determine the impact of this heat source localization. The difference in temperature rise predictions based on the BTE and conventional diffusion theory increases by a factor of twenty as the heat source size varies from 10 A to 0.1Λ.