Correction-Free Multi-Bit Sigma-Delta Modulators for ADSL

摘要

This chapter first presents a scalable MASH dual-quantization architecture and a companion optimum set of scaling coefficients which result into minimum resolution losses. The chapter then outlines the dominant circuit imperfections that degrade the operation of this architecture, and presents illustrative design exploration considerations induced by these circuit imperfections. Finally, some practical considerations pertaining to the implementation of an ADSL sigma-delta modulator in 0.25- μm CMOS technology are given and illustrated through experimental results.