IMPLEMENTATION OF A NEURAL NETWORK IN MULTICORE HARDWARE

摘要

A multicore hardware implementation of a deep neural network is disclosed. A plurality of layers of the network is arranged in plurality of layer groups. The input data to the network comprises a multidimensional tensor including one or more traversed dimensions, being dimensions that are traversed by strides in at least one layer of a first layer group, and one or more non-traversed dimensions. The hardware implementation is configured to split the evaluation of the first layer group into at least a first pass and a second pass, along one of the traversed dimensions or one of the non-traversed dimensions. A first core is configured to evaluate the first layer group for the first pass, to generate a first portion of output data. A second core is configured to evaluate the first layer group for the second pass, to generate a second portion of output data. The hardware implementation is configured to combine the first portion of output data and the second portion of output data to produce the output data of the first layer group.