首页> 外国专利> Floating-point units configured to perform fused multiply-accumulate operations on three 128-bit extended operands, their methods, programs, and systems.

Floating-point units configured to perform fused multiply-accumulate operations on three 128-bit extended operands, their methods, programs, and systems.

机译:配置为对三个128位扩展操作数及其方法、程序和系统执行融合乘法累加运算的浮点单元。

摘要

PROBLEM TO BE SOLVED: To provide a unit for performing a fused product sum floating point operation on a 128-bit extended operand. A floating point unit (10) configured to perform a fused product sum operation on three 128-bit extended operands (100, 102, 104), comprising: (i) 113×113-bit multiplication. (14), (ii) left shifter (18), (iii) right shifter (20), (iv) selection circuit (24) including a 3 to 2 compressor (25), and (v) selection circuit A first feedback path (36) connecting an adder (26) connected to the data flow from (24) and (vi) a carry output (91) of the adder (26) to a selection circuit (24). And (vii) a second feedback path (38) connecting the output of the adder (26) to the shifter (18, 20) for passing the intermediate expansion result (86) through the shifter (18, 20). A floating point unit (10). [Selection diagram] Figure 1
机译:需要解决的问题:提供一个单元,用于在128位扩展操作数上执行融合积和浮点运算。(一个扩展位操作数)对128位和(一个扩展位操作数)进行乘法运算。(14) ,(ii)左移位器(18),(iii)右移位器(20),(iv)包括3到2压缩器(25)的选择电路(24),以及(v)连接加法器(26)的第一反馈路径(36),加法器(26)连接到来自(24)的数据流,并且(vi)加法器(26)的进位输出(91)连接到选择电路(24)。以及(vii)将加法器(26)的输出连接到移位器(18,20)的第二反馈路径(38),用于将中间扩展结果(86)通过移位器(18,20)。浮点单元(10)。[选择图]图1

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