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Analog Hardware Realization of Trained Neural Networks

机译:培训神经网络的模拟硬件实现

摘要

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes calculating one or more connection constraints based on analog integrated circuit (IC) design constraints. The method also includes transforming the neural network topology to an equivalent sparsely connected network of analog components satisfying the one or more connection constraints. The method also includes computing a weight matrix for the equivalent sparsely connected network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent sparsely connected network.
机译:提供了用于神经网络的模拟硬件实现的系统和方法。 该方法在获得训练有素的神经网络的神经网络拓扑和权重。 该方法还包括基于模拟集成电路(IC)设计约束来计算一个或多个连接约束。 该方法还包括将神经网络拓扑转换为满足一个或多个连接约束的类似物种组件的等效稀疏连接网络。 该方法还包括基于训练的神经网络的权重计算等效稀疏连接网络的权重矩阵。 权重矩阵的每个元素表示等效稀疏连接网络的模拟组件之间的相应连接。

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