Just in time data placement in NAND flash

摘要

A memory system includes a memory array and a memory controller. The memory array includes a plurality of memory dies communicatively coupled via a plurality of memory channels, each memory channel communicatively coupled to a subset of the plurality of memory dies. The memory controller includes a command scheduler configured to determine an operator status of each memory die of the memory array, determine, based on the operator status of each of the memory dies, an order in which to output commands to the memory dies, update a mapping table based on the determined order in which to output the commands to the memory dies of the memory array, and output the commands to the memory dies of the memory array in the determined order in the mapping table.