Configurable input and output blocks and physical layout for analog neural memory in deep learning artificial neural network

摘要

Configurable input and output blocks and physical layouts for analog neural memory systems using non-volatile memory cells are disclosed. The input block may be configured to support a different number of arrays arranged in a horizontal direction, and the output block may be configured to support a different number of arrays arranged in a vertical direction. Tunable components for use with configurable input blocks and output blocks are disclosed.