ULTRA LOW POWER, REAL TIME CLOCK GENERATOR USING A MICROELECTROMECHANICAL RESONATOR AND JITTER COMPENSATION METHOD IN THIS CLOCK GENERATOR

摘要

A clock generator (30) having a variable-modulus frequency divider (34), receiving a high-frequency clock signal (HFCK) and outputting a divided clock signal (DIV) having a frequency controlled by a modulus-control signal (MC) generated by a temperature-compensation circuit (36). A jitter filter (35) is coupled to the output of the variable-modulus frequency divider (34) and to the temperature-compensation circuit (36) and generates a compensated clock signal (OUT) having switching edges that are delayed, with respect to the divided clock signal (DIV), by a time correlated to a quantization-error signal.