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Low latency polar coding and decoding by merging of states of the polar code graph

机译:通过极性代码图的状态合并通过合并状态低延迟极性编码和解码

摘要

A polar decoder kernal is described. The polar decoder kernal is configured to: receive one or more soft bits from a soft kernal encoded block having a block size of N and output one or more recovered kernal information bits from a recovered kernal information block having a block size of N. The polar decoder kernal comprises a decomposition of a polar code graph into an arbitrary number of columns depending on the kernal block size N.
机译:描述了极性解码器核。 极性解码器kernal被配置为:从具有n的块大小的块大小接收一个或多个软比特,并从具有n的块大小的恢复的核信息块输出一个或多个恢复的核信息位。 解码器kernal包括根据核块大小N的任意数量的列分解极性代码图。

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