POWER CONSUMPTION REDUCTION CIRCUIT OF GPUS IN SERVER AND SERVER

摘要

A power consumption reduction circuit of GPUs in a server, and a server, the power consumption reduction circuit comprising a frequency reduction control chip. After receiving an overpower alarm signal generated by a PSU, the frequency reduction control chip generates a frequency reduction control signal to a PWRBRK pin of each GPU so as to start the frequency reduction operation of each GPU. Hence, in the present application, a bottom layer hardware circuit is directly used for implementation, without intervention of an operating system, and the response speed is relatively high, so that the whole frequency reduction operation of the GPUs may be completed within 5 ms, and the PSU does not trigger overpower protection within said relatively short period time, thereby preventing the occurrence of the situation in which service data of a user is lost due to abnormal power failure of the server.