Digital active interference cancellation for full duplex transmit-receive (TX-RX) concurrency

摘要

Technologies directed to digital active interference cancellation (d-AIC) for full duplex transmit-receive (TX-RX) concurrency. An integrated circuit can include first and second analog front-ends (AFE) and digital front-end (DFE) circuits and a digital AIC circuit that generates a scaled and delayed replica of a first quadrature (IQ) sample corresponding to first data transmitted by the first AFE circuit which is being coupled into the receiver as aggressor. The digital AIC circuit receives a second IQ sample from the second AFE circuit, the second IQ sample corresponding to second data being received by the second AFE circuit. The digital AIC circuit subtracts the scaled and delayed replica of the first IQ sample from the second IQ sample to obtain a third IQ sample and sends the third IQ sample to the second DFE circuit. Third IQ sample is the desired signal when d-AIC cancels the self-interference.