SYSTEM AND METHOD FOR LOW LATENCY MULTI-MARKET ORDER BOOK CONSOLIDATION

摘要

The present disclosure provides techniques and associated systems for low-latency integrated circuit-based feed handler circuits and multi-market order book consolidator circuits. In some embodiments, integrated circuit-based feed handler circuits described herein can be configured to store aggregate quantities of instruments and/or determine round-lot price levels in a parallel hardware configuration. In some embodiments, integrated circuit-based order book consolidator circuits described herein can be configured to determine consolidated prices across multiple market data feeds and/or for different groups of markets in parallel hardware configurations. According to various embodiments, aspects of the present disclosure can be implemented using one or more FPGAs, ASICs, and/or combinations thereof.