Systems and methods for implementing an inference engine by optimizing programming behavior

摘要

a plurality of memory cells arranged in rows and columns, a plurality of bit lines each connected to one of the columns of memory cells, and a plurality of differential sense amplifiers each having first and second inputs and an output; memory device. For each of the differential sense amplifiers, the differential sense amplifier is configured to generate on an output an output signal having an amplitude that is based on a difference in signal amplitudes on the first and second inputs, the first input comprising the bit lines connected to one of the bit lines, and the second input is connected to the other of the bit lines. Alternatively, the one or more sense amplifiers are configured to detect signal amplitudes on the bit lines, and the device is configured to generate output signals each based on a difference in signal amplitudes on two of the bit lines. Includes computational circuitry.