首页> 外国专利> A METHOD FOR OPTIMIZED MANAGEMENT OF THE POWER IN AN ELECTRONIC CIRCUIT COMPRISING A PROCESSING SYSTEM AND A FURTHER CIRCUIT, CORRESPONDING CIRCUIT AND APPARATUS

A METHOD FOR OPTIMIZED MANAGEMENT OF THE POWER IN AN ELECTRONIC CIRCUIT COMPRISING A PROCESSING SYSTEM AND A FURTHER CIRCUIT, CORRESPONDING CIRCUIT AND APPARATUS

机译:一种用于优化管理电子电路的电力管理的方法,包括处理系统和另一电路,对应电路和装置

摘要

A method for managing the power supply in an electronic circuit comprising a processing system (11; 11'), in particular a general purpose microcontroller or a System-on-Chip or a subsystem thereof, with a radio-frequency embedded circuit (12),said processing system (11; 11') comprisingat least a processing core (30, V12I, VI2O) and a first power regulation module (111') supplying a first regulated voltage (V12) to said processing core (30),said radio frequency embedded circuit (12) comprising a second power regulation module (121) supplying a second regulated voltage (Vreg) to circuits (122) of the radio-frequency embedded circuit including a radio frequency transceiving portion (124), said second power regulation module (122) comprising a switched-mode power supply (1211) and generating a second regulated voltage (Vreg),said method comprising coupling said second regulated voltage (Vreg) as voltage input of said first power regulation module (1111), said first power regulation module (1111) which generates as an output a respective first regulated voltage (Vregm) for said processing core (30),controlling said second power regulation module (121) to operate according to a plurality of operation modes (LP1, LP2, A1, A2, LP3, LP4) includingone or more sleep modes (LP1, LP2) in which both the DC-DC converter (1211) and the second linear regulator (121) are off andone or more active modes (A1, A2) in which both the DC-DC converter (1211) and the second linear regulator (121) are on,wherein said second power regulation module (122) comprises a second linear regulator (1212) andsaid plurality of modes (LP1, LP2, A1, A2, LP3, LP4) includesa first further sleep mode (LP3) in which the switched-mode power supply (1211) is off and the second linear regulator (1212) is on anda second further sleep mode in which the switched-mode power supply (1211) is on and the second linear regulator (1212) is off.
机译:一种用于管理电子电路中的电源的方法,包括处理系统(11; 11'),特别是通用微控制器或片上系统,具有射频嵌入式电路(12) ,所述无线电,所述处理系统(11; 11')包括至少一种处理核心(30,V12i,Vi2o)和向所述处理核(30)提供第一调节电压(V12)的第一功率调节模块(111')。频率嵌入式电路(12),包括将第二调节电压(Vreg)提供给包括射频嵌入式电路的电路(122)的第二功率调节模块(121),所述第二功率调节模块包括射频收发部分(124) (122)包括开关模式电源(1211)并产生第二调节电压(Vreg),所述方法包括耦合所述第二调节电压(Vreg)作为所述第一功率调节模块(1111)的电压输入,所述第一电源监管模块(1111)作为输出作为所述处理核(30)的相应第一调节电压(Vregm),控制所述第二功率调节模块(121)以根据多个操作模式(LP1,LP2,A1,A2操作,LP3,LP4)包括或更多的睡眠模式(LP1,LP2),其中DC-DC转换器(1211)和第二线性调节器(121)都关闭了ANDONE或更多的活动模式(A1,A2) DC-DC转换器(1211)和第二线性调节器(121)均在开启,其中所述第二功率调节模块(122)包括第二线性调节器(1212)和通存多种模式(LP1,LP2,A1,A2,LP3, LP4)包括第一进一步的睡眠模式(LP3),其中开关模式电源(1211)关闭,第二线性调节器(1212)在ANDA和第二进一步睡眠模式,其中开关模式电源(1211)是开启和第二线性调节器(1212)关闭。

著录项

  • 公开/公告号EP3702886B1

    专利类型

  • 公开/公告日2021-09-22

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS S.R.L.;

    申请/专利号EP20200157715

  • 发明设计人 MANGANO DANIELE;BUTTA PASQUALE;

    申请日2020-02-17

  • 分类号G06F1/32;G06F1/3234;G06F1/3287;H02M1;

  • 国家 EP

  • 入库时间 2022-08-24 21:11:35

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