ANALOG NEURAL MEMORY ARRAY IN ARTIFICIAL NEURAL NETWORK WITH SUBSTANTIALLY CONSTANT ARRAY SOURCE IMPEDANCE WITH ADAPTIVE WEIGHT MAPPING AND DISTRIBUTED POWER

摘要

Numerous embodiments of analog neural memory arrays are disclosed. In certain embodiments, each memory cell in the array has an approximately constant source impedance when that cell is being operated. In certain embodiments, power consumption is substantially constant from bit line to bit line within the array when cells are being read. In certain embodiments, weight mapping is performed adaptively for optimal performance in power and noise.