FPGA-BASED LARGE RADIO INTERFERENCE ARRAY CORRELATOR IMPLEMENTATION METHOD AND APPARATUS

摘要

An FPGA-based large radio interference array correlator implementation method and apparatus, being aimed at solving the problems of the low efficiency and high energy consumption of an existing CPU/GPU-based correlator when performing relevant real-time calculation on a large antenna array. The implementation method comprises: obtaining the number of data channels of a radio interference array, and averagely grouping the data channels; and respectively calculating, by means of corresponding correlation calculation modules, the auto-correlation of group data itself, and the full correlation between a data group and other data groups, and performing accumulation within an integration period to complete the full correlation operation of the radio interference array. The method of grouping division and time division multiplexing effectively uses an FPGA resource, simplifies an FPGA operation process, is low in power consumption, high in efficiency, easy in expansion, and suitable for a system operation process that is highly parallel and has a high requirement for real-time performance, and provides an efficient solution for the real-time operation of mass data of a large radio interference array.