Image processor with high-throughput internal communication protocol

摘要

A processor is described. The processor includes a network. The plurality of processing cores are coupled to the network. The processor includes transmitter circuitry coupled to the network. The transmitter circuitry transmits output data generated by one of the processing cores to the network. The transmitter circuit includes control logic circuitry that causes the transmitter circuit to transmit a request for transmission of a second packet of output data before the transmitter circuit completes transmission of a previous first packet of output data.