DEVICES, METHODS, AND SYSTEMS FOR INSTRUCTIONS FOR REQUESTING A HISTORY RESET OF A PROCESSOR CORE

摘要

Systems, methods, and apparatus are described in relation to instructions for resetting software thread runtime property histories in a hardware processor. In one embodiment, a hardware processor includes a hardware guide scheduler having multiple software thread runtime property histories; a decoder for decoding a single instruction into a decoded single instruction, the single instruction having a field which identifies a model-specific register; and an execution circuit for executing the decoded single instruction to check that an enable bit of the model-specific register is set and, if the enable bit is set, to reset the multiple software thread runtime property histories of the hardware guide scheduler .