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Parallelizing encoding of binary symmetry-invariant product codes

机译:二进制对称性产品代码的并行编码

摘要

An encoder encodes input data utilizing a binary symmetry-invariant product code including D data bits and P parity bits in each dimension. The encoder includes a half-size data array including K subarrays each having multiple rows of storage for H bits of data, where D is an integer equal to 2×H+1 and K is an integer that is 2 or greater. The encoder is configured to access K rows of data by reading a respective H-bit data word of input data from each of the multiple subarrays and K H-bit data words of duplicate data from across multiple different rows of the subarrays. The encoder further includes at least one register configured to receive the bits read from the half-size data array code and rotate them as needed, at least one row parity generator, and a column parity generator that generates column parities based on row parity.
机译:编码器使用每个维度中的二进制对称性产品代码和每个维度中的P奇偶校验位进行编码。编码器包括半尺寸的数据阵列,包括k子阵列,每个数据阵列具有用于H比特的H比特的多行存储,其中D是等于2×H + 1的整数,并且k是2或更大的整数。编码器被配置为通过从多个子阵列的每个多个子阵列和k H位数据字的输入数据的相应的H位数据字来访问k行数据。编码器还包括至少一个寄存器,该寄存器被配置为接收从半尺寸数据阵列码读取的比特,并根据需要旋转它们,至少一个行奇偶校验发生器和基于行奇偶校验生成列间隔的列奇偶校验发生器。

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