The present application provides shift register, gate driver-on-array circuit and driving method thereof, display device. The shift register includes input sub-circuit, output sub-circuit and step-down sub-circuit. The input sub-circuit is configured to, in input stage, charge pull-up node to first voltage level based on signal input from signal input terminal. The output sub-circuit is configured to, in output stage, pull up voltage level at pull-up node to second voltage level. The step-down sub-circuit is configured to, in output stage, pull down voltage level at pull-up node from second voltage level to third voltage level after voltage level at pull-up node is pulled up to second voltage level. The output sub-circuit is further configured to, in output stage, output first clock signal input from first clock signal input terminal through signal output terminal under control of pull-up node.
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