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Timing module, phase synchronization circuit, phase synchronization method and phase synchronization program

机译:定时模块,相位同步电路,相位同步方法和相位同步程序

摘要

PROBLEM TO BE SOLVED: To provide a timing module capable of eliminating a need for developing a timing module in each market, suppressing a development cost, an operation cost and a production cost, securing a high stability and a high accuracy quality, measuring a frequency of a received reference timing signal, and automatically generating a required frequency on the basis of the measurement results.;SOLUTION: A timing module using a PLL that receives a reference timing signal and outputs a corresponding synchronization clock, comprises a line interface part that can receives a plurality of types of reference timing signals alternatively. The line interface part automatically sets a parameter stored in a storage part in the line interface part on the basis a signal type of the received reference timing signal.;SELECTED DRAWING: Figure 4;COPYRIGHT: (C)2019,JPO&INPIT
机译:要解决的问题:提供一种时序模块,能够消除每个市场中开发定时模块的时序模块,抑制开发成本,操作成本和生产成本,确保高稳定性和高精度质量,测量频率接收的参考定时信号,并基于测量结果自动生成所需的频率。;解决方案:使用PLL接收参考定时信号并输出​​相应的同步时钟的定时模块,包括可以的线界面部分或者,接收多种类型的参考定时信号。线路接口部分在基础上自动将存储在存储部分中的存储部分中的参数设置为接收的参考定时信号的信号类型。;选定的绘图:图4;版权:(c)2019,JPO和INPIT

著录项

  • 公开/公告号JP6897955B2

    专利类型

  • 公开/公告日2021-07-07

    原文格式PDF

  • 申请/专利号JP20170063052

  • 发明设计人 高橋 正行;

    申请日2017-03-28

  • 分类号H03L7/08;H03L7/085;

  • 国家 JP

  • 入库时间 2022-08-24 19:45:29

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