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FPGA SPECIALIST PROCESSING BLOCK FOR MACHINE LEARNING
FPGA SPECIALIST PROCESSING BLOCK FOR MACHINE LEARNING
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机译:机器学习的FPGA专家处理块
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摘要
The present disclosure describes a digital signal processing (DSP) block that includes a plurality of columns of weight registers and a plurality of inputs configured to receive a first plurality of values and a second plurality of values. The first plurality of values is stored in the plurality of columns of weight registers after being received. Additionally, the DSP block includes a plurality of multipliers configured to simultaneously multiply each value of the first plurality of values by each value of the second plurality of values.
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