The logic gate has a first input part (A) and a second input part (B), and further, a first memristor (M1), a second memristor (M2), a third one each having a positive electrode terminal and a negative electrode terminal. It has a memristor (M3) and a fourth memristor (M4). The logic gate has a first output (12) and a second output (14). The memristor is connected in a bulizi configuration. The negative terminal of the first memristor and the positive terminal of the second memristor are commonly connected to the first input, and the negative terminal of the third memristor and the positive terminal of the fourth memristor are common to the second input. Connected to The negative terminal of the second memristor and the negative terminal of the fourth memristor are commonly connected to the first output, and the positive terminal of the first memristor and the positive terminal of the third memristor are common to the second output. Connected to In use, the voltage of the at least one output, ie the potential difference between the first and the second output, corresponds to the result of a logical operation on the voltage applied to the first and the second input. [Selected figure] Figure 2
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