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RSA circuit module of RSA encryption system

机译:RSA RSA加密系统的电路模块

摘要

The present invention relates to an RSA encryption system, and more particularly, to generate two prime numbers p and q through a high-speed prime generator so that the hardware area of the RSA encryption system can be optimized and used, and the values of p and q are simplified Q_logic RSA encryption system, which is input into a Montgomery multiplier based on RSA encryption algorithm and encrypted with RSA encryption algorithm.
机译:RSA加密系统技术领域本发明涉及RSA加密系统,更具体地,通过高速PRIME发生器生成两个素数P和Q,使得RSA加密系统的硬件区域可以优化和使用,以及P的值和Q是简化的Q_Logic RSA加密系统,该系统基于RSA加密算法输入到蒙格索尔乘法器中,并用RSA加密算法加密。

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