The invention relates to a protocol translator module system and a method for an optimized translation between a common bus protocol and a SPI protocol using the protocol translator module system. The object to establish a high performance chip-internal bus protocol to SPI protocol translator module system which eliminates the disadvantages in the prior art will be solved by a protocol translator module system which is configured to translate a chip- internal bus read or write transfer to a corresponding SPI bus read or write transfer using a virtual address-map which is a result of an ADDR-signal of the protocol translator module system, wherein the protocol translator module system comprises at least a virtual address decoder configured to interpret the ADDR-signal of the chip-internal bus into slices which define SPI transfer parameters and a SPI state machine configured to manage SPI transfers according to selected SPI transfer parameters, whereas at least one slice of the ADDR-signal of 1-bit width defines an end of transfer, END, which de-assert a SS_N line after transfer if said END-bit is set, otherwise keep SS_N line asserted.
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