A memory device configured to support multiple memory densities is provided. The memory device includes a first plurality of electrical contacts corresponding to a first command/address channel, a second plurality of electrical contacts corresponding to a second command/address channel, a third plurality of electrical contacts corresponding to a first data bus, a fourth plurality of electrical contacts corresponding to a second data bus, and mode selection circuitry configured to place the memory device in the first mode or the second mode. In the first mode, the first plurality of memory cells is operatively coupled to the first and third pluralities of electrical contacts and the second plurality of memory cells is operatively coupled to the second and fourth plurality of electrical contacts. In the second mode, the first and second pluralities of memory cells are both operatively coupled to the first and third pluralities of electrical contacts.
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