Efficient and selective sparing of bits in the memory system

摘要

PROBLEM TO BE SOLVED: To provide efficient and selective sparing of bits in a memory system. A memory system for storing data is disclosed, and the memory system is a plurality of memory devices configured to store data, and each memory device has a plurality of bits. These memory devices are configured and associated as ranks to respond to requests, including and associated with memory devices and multiple memory devices associated with command and control signals. A memory control circuit configured to output to, a detector to detect bit errors in operation, and a spare bit error in response to the detector detecting a bit error. Includes a controller for remapping to lanes. [Selection diagram] FIG. 7