Procedures and systems for diagnosing hardware and software errors using time stamped events

摘要

Procedure performed by a computer processor of an observation device to classify errors in an electronic network using a time-controlled communication system and a high-resolution component, including:(i) the processor receives an initial error code generated in response to an initial error in the first function, the first error code being determined:an initial communication cycle of the electronic system associated with the first error; anda first time window corresponding to the first function of a first message in which the first error code is transmitted to the processor;(ii) the processor receives a second error code generated in the event of a second failure of the electronic system in response to a second error, the second error code determining:a second communication cycle of the electronic system associated with the second error; anda second time window corresponding to the second function of a second message in which the second error code is transmitted to the processor,on the basis of a time synchronized with the high-resolution component, the first time window and the second time window with the first error code respectively. fill in the second error code;(iii) the processor determines an execution cycle set assigned to the first function and the second function using an execution plan;(iv) the processor shall check whether the first cycle of the first error code is separated from the second cycle of the second error code by the execution cycle set out in the plan;(v) if the processor finds that the first cycle is not separated from the second cycle by the execution cycle offset, the processor shall also note that the first failure did not cause the second error;(vi) when the processor finds that the first cycle is separated from the second cycle by the execution cycle offset, the processor shall check on the basis of functional dependency data whether the mode of operation of any of the functions depends on the mode of operation of any other of the functions;(vii) where the processor establishes that the mode of operation does not depend on the mode of operation of another of the functions, the processor shall also note that the first and second errors are random;(viii) where the processor establishes that the mode of operation depends on at least one of the functions, the processor shall check whether the mode of operation of the second function depends on the mode of operation of the first function;(ix) if the processor finds that the mode of operation of the second function depends on the mode of operation of the first function,the processor further notes that the failure of the first function has caused the failure of the second function; and(x) where the processor finds t hat the operation of the second function does not depend on the operation of the second function, the processor shall also note that the first failure did not cause the second error;where:the execution cycle offset is an initial cycle offset;the procedure also includes that:step (iii) is repeated to determine a different cycle rotation; andthe steps (iv)-(x) are repeated using the other cycle set instead of the initial cycle set.