VOLTAGE SAMPLING CIRCUIT AND METHOD FOR SAMPLING VOLTAGE

摘要

A voltage sampling circuit is provided for sampling voltage of at least two sets of cells (1, 2) in a battery pack comprises at least two analog front ends comprising a low-side Analog Front End, AFE (11), connected to a first set of cells (1) and a high-side AFE (12) connected to a second set of cells (2), a subtractor (20) has a positive input terminal and a negative input terminal, the positive input terminal connecting to the output of the high-side AFE (12) for receiving the analog voltage output by the high-side AFE (12). When the first set of cells (1) is connected with the second set of cells (2) in series, the negative input terminal of the subtractor (20) connecting to the total positive of the first set of cells (1), when the first set of cells (1) is connected with the second set of cells (2) in parallel, the negative input terminal of the subtractor (20) is grounded.