AC parallel circuit, AC parallel method and parallel information processing device

摘要

PROBLEM TO BE SOLVED: To stop the current lap execution and estimate an undetermined value at high speed. An AND circuit 20 calculates the logical product of the AC enable and the output of a comparator 19, and outputs the calculation result to a node # (m-1) as a stop bit. Further, the estimation circuit 22 sets the completion signal # (m-1) to 1, and sets the estimated value in the data # (m-1). Then, based on the output of the AND circuit 20, the multiplexer 15 determines the completion signal # (m-1) and data # (m-1) of the cache memory 14 or the completion signal # (m−) generated by the estimation circuit 22. 1) and the estimated value # (m-1) are selected and output to the core 16. [Selection diagram] Fig. 2