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WRITE BUFFER CONTROL IN MANAGED MEMORY SYSTEM

机译:在受管内存系统中编写缓冲区控件

摘要

Upon receipt of a synchronize cache command, valid host data size in the SRAM write buffer is checked. If the valid data size is greater than a predetermined value, valid host data in the SRAM write buffer is flushed directly into an open MLC block based on a one-pass transfer program. However, if the valid host data size is less than the predetermined value, the host data is not flushed to an open MLC block but is instead flushed into a temporary storage location to satisfy the command specifications for a command to synchronize a cache. The host data is maintained in the SRAM write buffer, which receives additional data until full. Once full, the host data in the SRAM write buffer is transferred to an open MLC block in one-pass. If the host data in the write buffer is lost, it may be recovered from the temporary storage location.
机译:在接收到同步缓存命令后,检查SRAM写缓冲区中的有效主机数据大小。如果有效的数据大小大于预定值,则基于单通传输程序将SRAM写缓冲区中的有效主机数据直接刷新到开放式MLC块中。但是,如果有效的主机数据大小小于预定值,则不将主机数据刷新为开放MLC块,而是刷新为临时存储位置以满足命令以同步缓存的命令规范。主机数据在SRAM写缓冲区中维护,该缓冲区接收其他数据直到满。完整后,SRAM写缓冲区中的主机数据在单次通过中传输到开放式MLC块。如果写缓冲区中的主机数据丢失,则可以从临时存储位置恢复它。

著录项

  • 公开/公告号WO2021035551A1

    专利类型

  • 公开/公告日2021-03-04

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号WO2019CN102902

  • 发明设计人 TAN HUA;YANG HUI;SALI MAURO LUIGI;

    申请日2019-08-27

  • 分类号G06F12/02;

  • 国家 CN

  • 入库时间 2022-08-24 17:33:15

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