Circuit arrangement for measuring the reference distortion of after the start - stop - principle by means of supporting telegrafiezeichen one

摘要

913,981. Distortion of telegraph signals; measuring. SIEMENS & HALSKE A.G. Sept. 7, 1961 [Sept. 7, 1960], No. 32221/61. Class 40 (3). In a circuit for measuring the distortion of telegraph signals, the signal pulses are sampled at the nominal pulse centres referred to the beginning of the start pulse in order to produce a distortion-free signal, the incoming telegraph signals are delayed by half a pulse period and the distortion-free signals and the delayed signals are supplied to a comparator which determines the time interval between corresponding pulse reversals in the two signals. In the embodiment described, the largest value of the distortion which occurs over a given period is recorded. Circuit details.-The incoming telegraph signals are applied at E to a bi-stable circuit K1 which switches to the Z state on arrival of a start pulse and opens gate G1 whereupon a reset voltage is removed from counters Z1, Z2 which then start to count the 20 kc/s. pulses from oscillator TG. After 10, 30, 50 ... m/sec. the output b of Z2 opens G5, G6 to register the input pulse in K4 the output of which represents the distortion-free signal. K5 is initially in state T so that pulses on the output a of Z1 are passed by G2 to counter Z4 which produces an output pulse 10 m/sec.s later to open G7, G8, whereupon the state of K1 is transferred to K5 and gates G2, G3 are closed until the next pulse reversal alters the state of K1. The output of K5 is thus the input signal delayed by half a pulse period. Gates G9 or G10 is opened when K4 and K5 are in different states so that pulses on output b of Z1 are passed to G11, G12 and counter K9-K15. The state of K6 is continuously reversed by the outputs a, b of Z2 so as to activate G11, G12 alternately during the periods corresponding to leading and lagging distortion respectively. Stores KV9-KV15 and KN9-KN15 register the highest percentage leading and lagging distortion to have occurred previously. The pulses supplied from G9 or G10, representing in number the percentage distortion of a signal pulse being measured, step on counter K9-K15. If the count thus registered becomes equal to that registered in the appropriate store, all gates VGV9-VGV15 or VGV9-VGN15 are closed, K7 is reset to the O state and G11 or G12 is opened to pass any further pulses from G9 or G10 so as to increase the count stored. The counter K9-K15 is reset by the output a of Z2, i.e. at the pulse-centres of the distortionfree signals. The numbers stored in KV9- KV15 and KN9-KN15 in binary code are converted to decimal code and operate indicators such as lamps LV1, LV10 and LN1, LN10. After 140 m/secs. counter Z3 resets K2, Z1, Z2, K4, K5 until the next start pulse arrives at E. The period over which distortion measurement takes place is determined by monostable circuit KM or manually-operated switches T1, T2.