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Apparatus to generate an electrical binary representation of a number from a succession of electrical binary representations of decimal digits of the number

机译:从一连串数字的十进制数字生成数字的电子二进制表示的设备

摘要

977,430. Decimal-binary conversion. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 4,1962 [May 23,1961], No. 17229/62. Heading G4A. Conversion of a decimal number, in binarycoded form, to binary form is done by entering each decimal digit, highest order first, into a register and, by two cycles of addition with appropriate delays, effectively multiplying the digit by ten before entering the next order digit. The first decimal digit entered on key board 12 is translated into 1-2-4-8 code and passed through adder 16 into register 18. During the first cycle clock 14 opens gates 24 and 26 and the contents of the register delayed two bit times are added to the undelayed contents of the register. During the second cycle gates 20 and 22 are opened and the contents of the register delayed one bit time are added to the next binary-coded decimal digit. The adder is described with reference to Fig. 4b (not shown) and comprises accumulator and carry triggers. A second embodiment in which the register comprises a circulating store on the track of a magnetic drum is also described (Figs. 10,11, not shown).
机译:977,430。十进制二进制转换。国际商业机器公司。 1962年5月4日[1961年5月23日],编号17229/62。标题G4A。十进制数以二进制编码形式转换为二进制形式的方法是,首先将每个十进制数字(最高位)输入到寄存器中,然后通过两个加法循环并加上适当的延迟,在输入下一个顺序之前将数字有效乘以十。数字。在键盘12上输入的第一个十进制数字被转换为1-2-4-8码,并通过加法器16传递到寄存器18中。在第一个周期时钟14中,门24和26打开,寄存器的内容延迟了两位时间。被添加到寄存器的未延迟内容中。在第二周期期间,门20和22被打开,并且寄存器的内容延迟了一个比特时间被添加到下一个二进制编码的十进制数字。参考图4b(未示出)描述加法器,该加法器包括累加器和携带触发器。还描述了第二实施例,其中寄存器包括在磁鼓的轨道上的循环存储器(图10,11,未示出)。

著录项

  • 公开/公告号GB977430A

    专利类型

  • 公开/公告日1964-12-09

    原文格式PDF

  • 申请/专利权人 INTERNATIONAL BUSINESS MACHINES CORPORATION;

    申请/专利号GB19620017229

  • 发明设计人

    申请日1962-05-04

  • 分类号H03M7/08;H03M7/12;

  • 国家 GB

  • 入库时间 2022-08-23 15:34:49

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