Means for suppressing parasitic oscillations in tunnel diode circuit

• 1. 一种控制放大的自发辐射和抑制寄生振荡装置及方法 [P] . 中国专利： CN112103760B . 2021.04.20
• 2. 抑制放大自发辐射和寄生振荡的激光钕玻璃及其制备方法和应用 [P] . 中国专利： CN113185145A . 2021-07-30
• 3. CLOCK GENERATING CIRCUIT HAVING PARASITIC OSCILLATION SUPPRESSING UNIT AND METHOD OF SUPPRESSING PARASITIC OSCILLATION USING THE SAME [P] . 美国专利： US2014300423A1 . 2014-10-09

  机译： 具有寄生振荡抑制单元的时钟发生电路以及使用其的寄生振荡抑制方法

• 4. Bistable static power switching circuit - has full wave diode rectifier with Zener diode and thyristor circuit to suppress parasitic transients [P] . 法国专利： FR2344175B1 . 1978-11-17

  机译： 双稳态静态功率开关电路-具有齐纳二极管和晶闸管电路的全波二极管整流器，可抑制寄生瞬变

• 5. Bistable static power switching circuit - has full wave diode rectifier with Zener diode and thyristor circuit to suppress parasitic transients [P] . 法国专利： FR2344175A1 . 1977-10-07

  机译： 双稳态静态功率开关电路-具有齐纳二极管和晶闸管电路的全波二极管整流器，可抑制寄生瞬变

• 1. Analysis and Elimination of Parasitic Oscillation of SSC Transmitter [J] . Zhang Shenghu, Sun Liepeng, Feng Yong, 近代物理研究所和兰州重离子加速器实验室年报：英文版 . 2005,第001期
• 2. Neuron action potential detection with tunnel diode oscillation circuit [C] . Chen Lingyao, Tabib-Azar Massood IEEE Sensors . 2012
• 3. Tunnel diode/transistor integrated circuits. [D] . Liu, Qingmin. 2006
• 4. Neural Circuits: Control of excitatory hierarchical circuits by parvalbumin-FS basket cells in layer 5 of the frontal cortex: insights for cortical oscillations [O] . Yasuo Kawaguchi, Takeshi Otsuka, Mieko Morishima, -1
• 5. Self-oscillation and period adding from resonant tunnelling diode–laser diode circuit [O] . Figueiredo J. M. L., Romeira Bruno, Slight Thomas James, 2012

• 1. Tunnel Diode Loaded Microstrip Antenna with Parasitic Elements [J] . Rakesh N. Tiwari ,Prabhakar Singh . 电磁分析与应用期刊（英文） . 2012,第4期
• 2. Reducing Numerical Oscillations through Modified Circuits for Inclusion of Frequency Influence in Transmission Line Representation [J] . Leonardo S. Lessa ,Afonso J. Prado ,Sdrgio Kurokawa . 能源与动力工程 . 2012,第011期
• 3. A Simple Weighted Integration Method for Calculating Surface Tension Force to Suppress Parasitic Flow in the Level Set Approach [J] . 王剑峰 ,杨超 ,毛在砂 . 中国化学工程学报：英文版 . 2006,第6X期
• 4. A Very Low Level dc Current Amplifier Using SC Circuit: Effects of Parasitic Capacitances and Duty Ratio on Its Output [J] . Hiroki Higa ,Ryota Onaga ,Naoki Nakamura . 应用科学（英文） . 2014,第9期
• 5. ZVS全桥变换器整流二极管寄生振荡的抑制方法 [C] . 季锋 ,陈仲 ,史良辰 . 中国电源学会第十九届学术年会 . 2011
• 6. 移相全桥ZVS变换器寄生振荡抑制方法的研究 [A] . 刘沙沙 . 2014