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Digital counter arrangement, which contains a plurality of counting stages, the entry narrow input pulses of a common input line are fed via gates

机译:包含多个计数级的数字计数器装置,公共输入线的输入窄输入脉冲通过门馈入

摘要

1,049,856. Automatic frequency control systems. PLESSEY-U.K. Ltd. Aug. 23, 1963 [Aug. 31, 1962], No. 33600/62. Heading H3A. [Also in Division G4] Gating devices control the input to a predetermined number counter or frequencydivider to enable instantaneous re-setting. The counters (see Division G4-G6) may be used to control an oscillation generator to fine limits. A standard frequency F s is divided at 2 by K, Fig. 1, while the oscillator frequency F 0 to be controlled is divided at 6 by N, the resultant values being controlled to be equal by frequency comparator 8 and phase comparator 9 acting on the oscillator. The frequency comparator is shown in Fig. 2. Pulses from 2 and 6 are applied to opposite sides of a binary device 13 which controls gates 14, 15. As long as pulses appear alternately on leads 3 and 7 the gates 14, 15 are closed to the passage of pulses on leads 11b, 12b, but when two pulses occur in succession on one or other lead 3 or 7 the second pulse finds its gate 14 or 15 open and passes through to step a counter 17 forwards or backwards and via a reactor set 18 to alter the tuning of the oscillator 4. To prevent errors due to slow operation of gate 14 or 15 due to pulses on leads 3 and 7 being too close, circuits 11, 12 widen the input pulses. If then the widened pulses overlap an inhibit circuit 21 prevents stepping of the counter 17. The phase comparator 10, Fig. 3, provides fine control of the oscillator. When the two inputs from 2 and 6 are in phase a unidirectional voltage of constant level is produced at 53. If the inputs are not in phase a saw-tooth waveform of a frequency proportional to the difference in frequency of the two pulse trains is produced.
机译:1,049,856。自动频率控制系统。英国普莱西Ltd .. 1963年8月23日[Aug. [1962年3月31日],第33600/62号。标题H3A。 [也在G4分部中]选通设备控制到预定数字计数器或分频器的输入,以实现即时重置。计数器(请参阅G4-G6部分)可用于将振荡发生器控制到精细极限。在图1中,标准频率F s被2除以K,而要控制的振荡器频率F 0被6除以N,结果值由作用于频率比较器8和相位比较器9的值相等。振荡器。频率比较器如图2所示。来自2和6的脉冲施加到二进制设备13的相对侧,该二进制设备控制门14、15。只要脉冲交替出现在引线3和7上,门14、15就会关闭脉冲11b,12b上的脉冲通过,但是当两个脉冲连续出现在一根或另一根导线3或7上时,第二个脉冲发现其门14或15打开,并通过一个计数器向前或向后并通过一个计数器17电抗器组18改变振荡器4的调谐。为了防止由于引线3和7上的脉冲太近而导致门14或15的慢速操作引起的误差,电路11、12加宽了输入脉冲。如果这样,加宽的脉冲重叠,则禁止电路21阻止计数器17的步进。图3的相位比较器10提供了对振荡器的精细控制。当来自2和6的两个输入同相时,在53处产生恒定电平的单向电压。如果输入不同相,则会产生频率与两个脉冲序列的频率差成比例的锯齿波形。 。

著录项

  • 公开/公告号DE1258463B

    专利类型

  • 公开/公告日1968-01-11

    原文格式PDF

  • 申请/专利权人 THE PLESSEY COMPANY (U. K.) LIMITED;

    申请/专利号DE1963P032495

  • 发明设计人 NEWMAN JOHN DAVID;ELLIOT ROBERT ANTHONY;

    申请日1963-08-30

  • 分类号C08G65/46;G06F7/68;H03K21/00;H03K23/66;H03L7/113;H03L7/187;

  • 国家 DE

  • 入库时间 2022-08-23 13:24:57

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