Apparatus to convert a pure binary code into a binary-decimal code

摘要

1,142,658. Radix conversions. INTERNATIONAL STANDARD ELECTRIC CORP. 10 May, 1966 [13 May, 1965], No. 20650/66. Heading G4A. In apparatus to convert from pure binary to binary-decimal code, pulses are routed via logic circuitry to a binary counter and to a binarycoded-decimal counter, under control of a comparison unit comparing the binary input with the count of the binary counter. An input binary number E is compared with the contents of a binary counter Z in comparators Vgl1 (for the four lowest order bits) and Vgl2 (for the other bits). If either comparator indicates non-equality, unit ST resets to zero all the counters Z, DZ, HZ1, HZ2, and starts clock pulse generator TG. If comparator Vgl2 indicates non-equality, gate Tor routes the clock pulses through OR gate 02 to the 2SP2/SP stage of counter Z and to the 2‹ stages of counters HZ1, HZ2. On every third pulse counter HZ2 causes AND gate U2 to increment the units decade D2(1) of binary-coded-decimal counter DZ and to zeroize counter HZ2. On every fifth pulse counter HZ1 causes AND gate U1 to increment the tenths decade D1 (0À1) of counter DZ (except that every sixth pulse to this decade is suppressed at PU) and to zeroize counter HZ1. If comparator Vgl1 only indicates inequality, gate Tor routes the clock pulses to the 2‹ stage of counter Z and via a delay V3 and unit PU to the tenths decade D1 (0À1) of counter DZ. AND gate U2 is blocked. Any carry from stage 2SP1/SP to stage 2SP2/SP of counter Z increments counter HZ 1 and if the latter reaches a count of 5 it actuates AND gate U1 with results as before. The counter DZ finally holds the BCD equivalent of the pure binary input E.