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binaere electrical rechenschaltung

机译:比哪儿哦electrical热忱搜查令屯卦

摘要

1,183,572. Calculators; counters. NATIONAL RESEARCH DEVELOPMENT CORP. 4 April, 1967 [4 April, 1966; 23 May, 1966], Nos. 14860/66 and 22770/66. Headings G4A and G4D. Two manual starters are provided in binary arithmetic equipment having three electromagnetic relay registers, the relay contacts forming a parallel adder to add the contents of two of the registers into the third. Fig. 1 shows a stage of the adder, two relays or manual keys respectively controlling the contacts a and b in accordance with the addend and augend bits. IC is the carry-in line, receiving battery + or earth E depending on the carry value. OC is the carry-out line to the next stage. The sum bit is indicated by the lamp ILP. Alternatively, contacts a 7-9 and b 1-3 can be controlled by one relay or key and the other contacts by the other. A calculator for teaching computer operation fundamentals has a 4-stage parallel binary adder, with stages as above, except that the lamps ILP are replaced by sum relays (RLS) forming a bank of four. A second bank of four relays (RLB) is set with one operand by manual switches (I A to I D ) the switch settings being entered into the relays in true or complement form (F 3 ) according as addition or subtraction is required. The other operand is established on a third bank of four (RLA) in accordance with a one-out-of-n decimal key actuation, coded into binary form by a diode matrix, the matrix paths from the 1, 2, 4 and 8 keys to the respective binary relays being coloured differently from the other connections for pedagogic purposes. The second and third banks (RLB, RLA) control contacts as in Fig. 1, the sum relays (RLS) charging associated capacitors so that the sum can be transferred to the third bank (RLA) straight or with shift. The relays are visible and aligned with the corresponding switches and with lamps indicating the relay states. Multiplication and division are performed by repeated addition and subtraction respectively, subtraction being by complemented addition (see above), and end-aroundcarry being provided in the adder when subtraction and division are being performed. If the capacity of the " sum " relays (RLS) is exceeded or a negative result is obtained, the most significant carry line inhibits operation. A machine cycle (e.g. one addition) occurs each time a press-button (P) is pushed. Alternatively, operation can continue automatically as long as a manual switch (Q) is closed and optionally until a binary counter (Figs. 6A-6C), counting the number of cycles, reaches capacity. Since the initial counter reading can be preset manually, the number of cycles can be preselected. Multiplication by repeated addition can thus be done automatically by setting up the multiplicand on the second relay bank (RLB), and the complement of the multiplier in the binary counter. An electromechanical decimal counter, with display of count, also counts the number of machine cycles. Capacitors shunt relays in control circuitry to slow down machine operation. Binary counter (Figs. 6A-6C).-Pulses to be counted each actuate a relay (not shown) to momentarily reverse the movable contact RLY3 (Fig. 6C, right). The first such pulse thus causes charged capacitor CA to actuate relay RLC.A which holds via RLC.A2, allows C A to discharge via RLC.A1 when the count pulse ends, and allows capacitor C B to charge via RLC.A3. The second pulse connects the discharged capacitor C A across RLC.A to cause it to release thus allowing C A to charge and connecting charged capacitor C B across relay RLC.B causing it to actuate &c. The third pulse actuates RLC.A without affecting RLC.B and the fourth releases both and actuates relay RLC.C, and so on, the relays RLC.A to D thus counting in binary fashion. On a count of 15, the circuit across ML (bottom of Figures) is broken. The counter may be preset at any desired value by means of manual switches 1A to 1D and SET.
机译:1,183,572。计算器;柜台。国家研究发展公司,1967年4月4日[1966年4月4日; 1966年5月23日],第14860/66和22770/66号。标题G4A和G4D。在具有三个电磁继电器寄存器的二进制算术设备中提供了两个手动启动器,这些继电器触点形成一个并行加法器,以将两个寄存器的内容加到第三个寄存器中。图1示出了加法器,两个继电器或手动键的阶段,分别根据加数和加数位来控制触点a和b。 IC是进线,根据进位值接收电池+或接地E。 OC是进行下一阶段的生产线。总数位由灯ILP指示。替代地,触点a 7-9和触点b 1-3可以通过一个继电器或按键来控制,而另一个触点则可以通过另一个来控制。用于教授计算机操作基础知识的计算器具有一个四级并行二进制加法器,具有与上述相同的级,不同之处在于,灯ILP被形成四个一组的和继电器(RLS)代替。第二组四个继电器(RLB)由一个手动操作开关(IA至I D)设置一个操作数,开关设置根据需要加法或减法以真实或补码形式(F 3)输入到继电器中。另一个操作数根据n个十进制键激活一次在四进制的第三个存储区(RLA)上建立,并由二极管矩阵编码为二进制形式,矩阵路径分别来自1、2、4和8出于教学目的,相应二进制继电器的键与其他连接的颜色不同。第二排和第三排(RLB,RLA)控制触点,如图1所示,和继电器(RLS)对关联的电容器充电,以便总和可以直接或通过移位转移到第三排(RLA)。继电器可见,并与相应的开关和指示继电器状态的指示灯对齐。乘法和除法分别通过重复加法和减法来执行,减法通过补数加法(见上文)进行,并且在进行减法和除法时在加法器中提供端到端进位。如果超过了“求和”继电器(RLS)的容量或得出的结果是负数,则最高有效的进位线会禁止运行。每次按下按钮(P)都会发生一个机器周期(例如一次加法)。可替代地,只要关闭手动开关(Q),操作就可以自动继续,并且可选地直到计数周期数的二进制计数器(图6A-6C)达到容量为止。由于可以手动预设初始计数器读数,因此可以预先选择循环数。因此,通过在第二继电器组(RLB)上设置被乘数,并在二进制计数器中设置乘数的补数,可以自动完成重复加法的乘法运算。带有计数显示的机电十进制计数器也可对机器循环数进行计数。电容器会在控制电路中并联继电器,以减慢机器的运行速度。二进制计数器(图6A-6C)-每个要计数的脉冲均会触发一个继电器(未显示),以使可动触点RLY3瞬时反转(图6C,右)。因此,第一个这样的脉冲使充电的电容器CA致动继电器RLC.A,该继电器经由RLC.A2保持,在计数脉冲结束时允许C A通过RLC.A1放电,并允许电容器C B通过RLC.A3充电。第二个脉冲将放电的电容器C A连接到RLC.A两端,使其释放,从而允许C A充电,并将充电的电容器C B连接到继电器RLC.B两端,从而致动&c。第三个脉冲在不影响RLC.B的情况下启动RLC.A,第四个脉冲将其释放并启动继电器RLC.C,依此类推,继电器RLC.A至D以二进制方式计数。计数为15时,ML上的电路断开(图的底部)。可以通过手动开关1A至1D和SET将计数器预设为任何所需的值。

著录项

  • 公开/公告号DE000001549507A

    专利类型

  • 公开/公告日1971-01-21

    原文格式PDF

  • 申请/专利权人 NAT RES DEV;

    申请/专利号DE1549507A

  • 发明设计人 THOMAS SIMMONDS DAVID;

    申请日1967-04-01

  • 分类号

  • 国家 DE

  • 入库时间 2022-08-23 09:53:10

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