DIGITAL DIFFERENTIAL ANALYZER EMPLOYING COUNTERS CONTROLED BY LOGIC LEVELS

摘要

1,197,991. Electric digital calculators. STANDARD TELEPHONES & CABLES Ltd. 17 Aug., 1967, No. 37851/67. Heading G4A. A data processor comprises a plurality of active storage registers, the quantity stored in a register being represented by the difference between the count in that register and the count in a reference register. Each register A, B, C comprises a synchronous binary counter stepped by clock pulses only if the associated input gate is on. Each gate is controlled through an OR gate (Fig. 2, notSP4/SPshown) by four AND gates, each of which is controlled by the presence or absence of data and by a programme sequencer. Register A provides the phase reference for B and C. Data may be read into B and C without change of A and after processing, such as multiplication, division, taking the square root, or transformation of rectangular, polar or hyperbolic co-ordinates, the answer may be read out of B or C by stepping along with A. With suitable programming the system may be used for digital differential analysis, or combined with analogue inputs or outputs, and may provide trigonometrical functions. A bi-stable stage in the output of a counter (Fig. 2, not shown) indicates the sign of the output.