SELF-CLOCKING SYSTEM HAVING A VARIABLE FREQUENCY OSCILLATOR LOCKED TO LEADING EDGE OF DATA AND CLOCK

摘要

1338309 Automatic phase control INTERNATIONAL BUSINESS MACHINES CORP 19 April 1971 [31 March 1970] 21762/71 Heading H3A In an arrangement for synchronizing a clock signal with received data, a gating signal is produced for each data pulse of a predetermined value and is applied to an error signal generator together with a signal from the clock oscillator to produce an error signal which applies control pulses to the oscillator directly and via an integrator. In one embodiment, Fig. 2, the clock oscillator signal on line 10 is fed to a pulse generator 20, which provides reset pulses for a bi-stable 22 and discharge signals for capacitor C1. The capacitor C1 then charges via positive source 26 until the arrival of a logical 1 on data line 5 sets bi-stable 22 to reverse the direction of charge, or in the event of a logical 0, until the arrival of the next capacitor discharge signal. The resulting sawtooth signal on line 6 is then applied to voltage/current converters (51, 54, Fig. 4, not shown) the outputs from which are sampled by a gating signal also derived from the controlled oscillator signal to produce a pulse signal having a magnitude dependent on the phase error. This signal is then fed to an integrator, Fig. 5 (not shown), to produce a control signal for the oscillator having a large short duration component and a small long duration component. In an alternative arrangement, Fig. 3 (not shown), the sawtooth signal on line 6 is derived directly from the clock oscillator, which is a sawtooth generator.