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Para metro arrangement for ausfiehrung logical operations and process for their preparation

机译:辅助地铁逻辑操作的准地铁安排及其准备过程

摘要

1,199,755. Parametric devices. TDK ELECTRONICS CO. Ltd. 9 Aug., 1967 [13 Aug. 1966 (2)], No. 36620/67. Heading H3B. A parametron is formed by the combination of an open-ended coil 2, Fig. 1, and its distributed inter-turn capacitance, the coil being wound on a conductor 1 coated with a magnetic film and inductively coupled with an input coil 3 and an output coil 4 formed on printed circuit boards 5. A three-stage logic circuit is shown, the A.C. excitation current being biased and applied cyclically and in turn to the conductors I of the three stages I to III. Several spaced open-ended coils 2 may be wound on the same magnetic conductor. The output coil 4 serves as a shield ring which prevents disturbance by external signals, and where a plurality of open-ended coils 2 are arranged in a single conductor, ferromagnetic end plates 7, Fig. 7A, may be provided to prevent interference between adjacent coils. Additionally ferromagnetic guard plates may be provided, Fig. 16A (not shown). A three-dimentional logic circuit is described in which ferromagnetic sheets 7, Fig. 8A, have alternate large and small apertures 9, 10. Each plate serves alternately as guard plates and end plates in the direction of stage progression, the wound conductors 1 being alternately offset to provide the required orientation between the apertures and the open-ended coils 2. A constructional detail is shown in Fig. 9 in which conductive rods 11 are coated with an electrodeposited layer of nickel permalloy, and the open-ended coils 13 are wound on a celluloid tube. The output and input coils are carried on printed circuit boards 16 which are assembled into a sandwich structure with apertured ferromagnetic plates 15 and spacers 17. A three-dimensional logic circuit is assembled by threading ferromagnetic plates 14, 15, the printed circuit boards 16 and the spacers 17 on a matrix of vertical alignment rods 19, the assembly being bonded together by heating a previously-applied thermoplastic, the rods 19 being removed. The magnetic film coated wires with their celluloid liners are then inserted through apertures in the structure, and are connected to terminal plates, Fig. 12 (not shown), the plates and wires being then covered with an insulating solidifying solution. The Specification discloses two constructional modifications, Figs. 13 and 14 (not shown), in which a stack of celluloid tubes is used with each magnetically coated wire.
机译:1,199,755。参数设备。 TDK ELECTRONICS CO.Ltd.1967年8月9日[1966年8月13日(2)],第36620/67号。标题H3B。由图1所示的开放式线圈2和其分布的匝间电容共同构成准同步器,该线圈缠绕在涂有磁性膜的导体1上,并与输入线圈3和输入线圈感应耦合。输出线圈4形成在印刷电路板5上。示出了三级逻辑电路,AC激励电流被偏置并周期性地施加,并依次施加到三级I至III的导体I。多个间隔开的开放式线圈2可以缠绕在同一磁导体上。输出线圈4用作防止外部信号干扰的屏蔽环,并且在将多个开放式线圈2布置在单个导体中的情况下,可以设置铁磁端板7(图7A)以防止相邻线圈之间的干扰。线圈。可以提供另外的铁磁保护板,图16A(未示出)。描述了一种三维逻辑电路,其中,图8A的铁磁片7具有交替的大和小孔9、10。每个板在载物台前进方向上交替用作保护板和端板,缠绕导体1为交替地偏移以在孔和开放式线圈2之间提供所需的方向。图9中显示了结构细节,其中,导电棒11涂有镍坡莫合金的电沉积层,开放式线圈13为缠绕在赛璐tube管上。输出和输入线圈承载在印刷电路板16上,印刷电路板16被组装成具有带孔的铁磁板15和间隔件17的夹心结构。通过将铁磁板14、15,印刷电路板16和15穿入螺纹来组装三维逻辑电路。在垂直对准杆19的矩阵上的间隔件17,通过加热先前施加的热塑性塑料将组件结合在一起,移除杆19。然后将带有其赛璐oid衬里的涂有磁性膜的电线穿过结构中的孔,并连接到端子板(图12(未显示)),然后用绝缘固化溶液覆盖这些板和电线。该说明书公开了两个结构上的修改,图1和2。参照图13和14(未示出),其中赛璐cell管的堆叠与每条磁性涂覆的线一起使用。

著录项

  • 公开/公告号DE1537469B2

    专利类型

  • 公开/公告日1972-12-21

    原文格式PDF

  • 申请/专利权人

    申请/专利号DE19671537469

  • 发明设计人

    申请日1967-08-12

  • 分类号H03K19/162;

  • 国家 DE

  • 入库时间 2022-08-23 07:16:27

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