A perfection amplifier hitch or latch circuit for accepting data signals from a monolithic memory provision. (Machine-translation by Google Translate, not legally binding)

摘要

A latch amplifier circuit for accepting data signals from a monolithic memory arrangement, which comprises: an entry node; input means having low impedance and connected to said input node, said input means being biased at a threshold current level; and differential circuit means connected to the output of said input means, and which essentially give a zero differential output when the signal coming from said monolithic memory arrangement maintains the polarization of the input means at the threshold current level; said differential circuit means giving a differential output indicative of a change in the signal coming from said monolithic memory arrangement, and said change in signal current having only a minimum effect on the potential level of the input node. (Machine-translation by Google Translate, not legally binding)