PHASE AMBIGUITY RESOLUTION SYSTEM USING CONVOLUTIONAL CODING-THRESHOLD DECODING

摘要

A synchronizer in the receive side of a digital communication system is inserted between the output of a PSK demodulator and the input of a threshold decoder of the type which can correct a predetermined number of bit errors in a convolutionally encoded bit stream. The synchronizer responds to error indicating pulses from the threshold decoder to alter the demodulated data by making the necessary corrections to resolve phase ambiguity and to achieve node synchronization. There are only a finite number of types of errors caused by phase ambiguity and improper node synchronization. The synchronizer includes a memory counter which has at least as many states as the number of all possible combinations of said types of errors. Each state of the memory counter controls correction of a different combination of said types of errors, so that there always exists one state of the memory counter which will make all the corrections needed to resolve phase ambiguity and achieve node synchronization. The memory counter is advanced by search pulses which are generated in the synchronizer by an error rate detector whenever the error indicating pulses from the threshold decoder are sufficiently numerous to indicate a gross error in the bit stream applied to the threshold decoder. As the search pulses continue to advance the memory counter through its states, it will eventually reach the state which makes all needed corrections. At that time there will no longer be a gross error in the bit stream applied to the threshold decoder, the search pulses will no longer be generated, and the memory counter will remain in the state which provides all needed corrections.