首页> 外国专利> Radar echo signal processor - uses delays and correlations to eliminate undesired echoes and retain wanted target echoes

Radar echo signal processor - uses delays and correlations to eliminate undesired echoes and retain wanted target echoes

机译:雷达回波信号处理器-使用延迟和相关性消除不需要的回波并保留所需的目标回波

摘要

A signal processing system for a radar system in which the reflected signals comprising a sequence of wanted and unwanted echoes are fed in for the suppression of the unwanted signals and which contains a delay unit introducing successive delay steps corresponding to the repetition periods of the transmitted pulses, and with an algebraic addition unit so arranged that a signal reaching a first input terminal of the counter circuit occurs later in the signal mixture later than one which simultaneously reaches a second input via the delay line; between the delay line (32) and the counter (38) there is a mixing unit M2 which mixes delayed signals with signals identified as output signals from a correlator (45) to give a correction output signal at 48 MHz which is fed to the second connection to the counter (38), as well as a signal correlator (CR1) which receives delayed signals as a single set of input signals as a first input, and also output signals from the counter as a second set of input signals.
机译:一种用于雷达系统的信号处理系统,其中反射信号包括有用和不想要的回声序列,用于抑制不想要的信号,并且包含一个延迟单元,该延迟单元引入与发射脉冲的重复周期相对应的连续延迟步骤以及具有这样的代数加法单元,使得到达计数器电路的第一输入端子的信号在信号混合物中比在同时经由延迟线到达第二输入的信号晚出现。在延迟线(32)和计数器(38)之间,存在混合单元M2,其将延迟的信号与被识别为来自相关器(45)的输出信号的信号进行混合,以提供48MHz的校正输出信号,该信号被馈送到第二个。与计数器(38)的连接,以及信号相关器(CR1),其接收延迟信号作为第一组输入信号作为第一输入,并且还从计数器输出信号作为第二组输入信号。

著录项

  • 公开/公告号NL7316750A

    专利类型

  • 公开/公告日1975-06-10

    原文格式PDF

  • 申请/专利号NL19730016750

  • 发明设计人

    申请日1973-12-06

  • 分类号G01S9/42;

  • 国家 NL

  • 入库时间 2022-08-23 04:37:22

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