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Eliminating interface states in MIOS structures - at low temp to avoid degradation of electrical props
Eliminating interface states in MIOS structures - at low temp to avoid degradation of electrical props
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机译:消除MIOS结构中的界面状态-在低温下避免电道具的退化
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摘要
In fabrication of a semiconductor device, where an oxide layer (SiO2) is formed on a semiconductor (Si) substrate and an insulating layer (Si3N4 or Al2O3) on the oxide is pervious to gas diffusion only at high temps., interface states at the oxide-substrate interface are eliminated by (a) implanting H ions (through the insulating layer) at the interface region, capable of entering the substrate lattice and (b) annealing the substrate in an inert atmos. at time and temp. sufficient to eliminate the interface states, pref. 1/2-1 hr. at 450-600 degrees C.
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