Timing generator circuit for telephone systems - has processor switched over from main to standby clock generator when former fails

摘要

The timing generator circuit, for controlling processors in telephone systems, has two clock-pulse generators (H1, H2) connected to a switching circuit (A) that connects one generator through to the processor (UT). The switching circuit output is monitored (F) for errors or failure and the result used (B) to switch the switching circuit over from the faulty clock generator to the second, standby generator. Both clock generators are coupled to a display circuit (V), which enables an operator to check the correct functioning of either generator. With this timing circuit, the failure of one generator does not result in the whole processing system coming to a stop.